Logic Systems N6 — Memo

August 2018 — N6 — Logic Systems

N6 2018 Nated Engineering

↓ Download PDF 📄 2.03 MB

Preparing document

📋 Document Analysis

📄 8 pages 📝 24 items found 📚 1 topics

See full analysis

Questions — A Preview of What to Expect in the Document

This section provides a quick preview of questions from the document. It may not display every question or the complete wording of each one. For the full content, including diagrams, tables and other information, view the original PDF above.

Q1— Section header —

1.1False The series digital to analogue converter works basically as an INTEGRATOR. It has a capacitor in the feedback loop.

1.2True A PLC can be programmed on your laptop using ladder diagrams. However when you compile your ladder program, that program is made up of binary zeros and ones. When you DOWNLOAD that program (from your laptop to

1.3True When you create a ladder diagram program you are looking at the screen of your computer (usually a laptop plasma screen\. That laptop has a microprocessor inside it. (Often this is an INTEL microprocessor.\ Once you

1.4True The Schmitt rigger output waveform is a PULSE TYPE waveform. At the hysteresis points it switches either on or off to create the on/off waveforms.

1.5True IR holds the whole instruction word: op code PLUS operand address.

1.6False The PROGRAM COUNTER holds the address of the next instruction.

1.7False The Control Unit and access to memory and all CPU operations are synchro nised by the system clock os cillator which is rated in giga hertz.

1.8False Relay logic is outdated. Relays might still be used to switch POWER but logic functions are accomplished using integrated circuits.

1.9False The interface is a PORT

1.10False MOST interfacing involves ACD or DAC. However an actuator like a stepper motor requires no DAC and some angular displacement transducers give a digital signal direct to the computer. (10 [20] 96020

Q2— Section header —

2.1.1Summing mplifier: (+0,010 0,025 + 0,300 0,100\

2.2.2Integrator: (2 (10\ [20]20

Q3— Section header —

3.1In this circuit the input voltage is positive and the output voltage must inverted to negative. +6 volt is measured at the output for a +1Volt input. This is wrong. Therefore the operational amplifier is faulty and must be replaced.

3.2Dual Slope A/D converter (8\

3.313V = 1101 BINARY 8 4 2 1 Start 1 0 0 0 = 08V Smaller than input voltage. Set next digit. 1 1 0 0 = 12V Smaller than input voltage. Set next digit. 1 1 1 0 = 14V Bigger than input voltage. Clear and set next digit.

Q4— Section header —

4.1.2(2 (8\

4.2Mathematical operations done before coding: z = v(t INSTRUCTION KOCATION/ INSTRUKSIE ADRES INSTRUCTION WORD/ INSTRUKSIEWOORD DESCRIPTION/

4.3RS 232 Protocol: Serial communication. Data is sent as a time series of bits. Both synchronous and asynchronous transmission/reception supported. RS 232 standard defines signal voltage levels, timing characteristics and

5.1VON NEUMANN ARCHITECTURE: Has only one memory a RAM so that the RAM is accessed TWICE during

5.2INTEL 8085 MICRO PROCESSOR (10\ [20] TOTAL:20

Topics Identified

Business Plan

Mark Allocation

Sections20 + 20 + 20 + 20 + 20 = 100 marks

Paper information

TitleMemo

SubjectLogic Systems

LevelN6

Document typeNated Engineering

Year2018

MonthAugust

Pages8

Downloads3

Examination context

Decade2010s

Years ago8y

SeasonWinter (SH)

Start dayWednesday

Exam periodAugust 2018

Days since exam2,991

About Logic Systems examination preparation

This TVET examination resource can be used as part of a structured revision programme. Past papers are most useful when learners attempt questions independently, work within a realistic time limit, and review their answers afterwards.

How to use this resource for revision

A TVET past examination paper is most useful when it is treated as an active revision exercise. Try the questions yourself before checking the corresponding memorandum. Where you make an error, identify the reason — was it a knowledge gap, a calculation mistake, an interpretation issue, or an examination technique problem?

For stronger examination practice, complete the paper without unnecessary interruptions and keep track of the questions that take the most time. Afterwards, review the memorandum and separate knowledge gaps from mistakes caused by interpretation, calculation, structure, or examination technique.

understanding question requirements

applying subject knowledge

working under time constraints

checking answers

identifying revision priorities

A practical revision approach

Start by completing the resource without looking at the memorandum. Review incorrect and incomplete answers afterwards and make a short revision list based on the areas that caused difficulty.

File details

File size2.03 MB

Pages8

Archived on8 September 2026

File age45d

ContributorFreeMode

FingerprintABA0B1BA060C

Questions and learner discussion

No questions or discussions have been posted yet.