Logic Systems N2 — Document

November 2023 — N2 — Logic Systems

N2 2023 Nated Engineering

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Q1— Section header —

1.1Various options are given as possible answers to the following questions. Choose the answer and write only the letter (A D\ next to the question number (1.1.1

1.1.5\n the ANSWER BOOK.

1.1.1In the binary system, the sum of 1011 and 1101 10111

1.1.2When the binary number 11 is subtracted from 10000 the

1.1.3If a binary number is 100 then the MSD is

1.1.4When t he decimal number 87 is converted to binary , it becomes

1.1.5With four binary bits, what is the largest decimal equivalent? 15

1.2erform the following arithmetic calculations below in the binary system , then convert each answer to decimal. Show all conversions and calculations clearly.

1.2.113 10 11 10

1.2.21101 110

1.2.327 10 14 10 (3 5\ (15\

1.3In order to add two or more bits, a circuit called full adder must be developed. This circuit will be able to cater for the in which is from the previous operation. Draw a circuit of a FULL ADDER consisting of two half adders

Q2— Section header —

2.1Describe the following codes:

2.1.1Non weighted code (2\

2.1.2Weighted code (1\

2.1.3Self complementing code (3\

2.2Use the decimal number 854 10 and convert it to the following codes:

2.2.18421 BCD code (4\

2.2.22421 BCD code (4\

2.2.3XS3 code

2.3A central processor used to monitor the data converts decimal number into 2421 binary code. Draw a circuit that will carry out this conversion. [25] 808026225

Q3— Section header —

3.1Provide a statement that best describes ROM.

3.2What does the acronym EPROM stand for? 3.

3.4.4\ in the ANSWER BOOK. COLUMN A COLUMN B 3. .1 3. .2

Q4— Section header —

4.1Explain the term shift register (2\

4.2Give the TWO basic functions of a register. (2\

4.3Give another name for asynchronous counter (1\

4.4List FOUR aspects that are used to differentiate between the types of counters.

4.5Shift registers are mainly classified into four types

4.5.1Name the FOUR types of shift registers (4\

4.5.2State ONE application of TWO types of shift register mentioned in

4.6raw a neat ly labelled diagram of a 4 bit asynchronous binary counter consisting of JK flip

Mark Allocation

Total100 marks

Sections25 + 25 + 25 + 25 = 100 marks

Paper information

TitleDocument

SubjectLogic Systems

LevelN2

Document typeQuestion paper

Year2023

MonthNovember

Pages6

Downloads5

Examination context

Decade2020s

Years ago3y

SeasonSpring (SH)

Start dayWednesday

Exam periodNovember 2023

Days since exam1,075

About Logic Systems examination preparation

This TVET examination resource can be used as part of a structured revision programme. Past papers are most useful when learners attempt questions independently, work within a realistic time limit, and review their answers afterwards.

How to use this resource for revision

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For stronger examination practice, complete the paper without unnecessary interruptions and keep track of the questions that take the most time. Afterwards, review the memorandum and separate knowledge gaps from mistakes caused by interpretation, calculation, structure, or examination technique.

understanding question requirements

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working under time constraints

checking answers

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A practical revision approach

Start by completing the resource without looking at the memorandum. Review incorrect and incomplete answers afterwards and make a short revision list based on the areas that caused difficulty.

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